Freescale Semiconductor /MKV56F24 /SystemControl /CM7_DTCMCR

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Interpret as CM7_DTCMCR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (0)EN 0 (0)RMW 0 (0)RETEN 0 (0)SZ

RETEN=0, RMW=0, SZ=0, EN=0

Description

Data Tightly-Coupled Memory Control Register

Fields

EN

TCM enable. When a TCM is disabled all accesses are made to the AXIM interface.

0 (0): TCM disabled.

1 (1): TCM enabled.

RMW

Read-Modify-Write (RMW) enable. Indicates that all writes to TCM, that are not the full width of the TCM RAM, use a RMW sequence.

0 (0): RMW disabled.

1 (1): RMW enabled.

RETEN

Retry phase enable. When enabled the processor guarantees to honor the retry output on the corresponding TCM interface, re-executing the instruction which carried out the TCM access.

0 (0): Retry phase disabled.

1 (1): Retry phase enabled.

SZ

TCM size. Indicates the size of the relevant TCM.

0 (0): No TCM implemented.

3 (11): 4KB.

4 (100): 8KB.

5 (101): 16KB.

6 (110): 32KB.

7 (111): 64KB.

8 (1000): 128KB.

9 (1001): 256KB.

10 (1010): 512KB.

11 (1011): 1MB.

12 (1100): 2MB.

13 (1101): 4MB.

14 (1110): 8MB.

15 (1111): 16MB.

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